
Asian Journal of Electrical Sciences (AJES)
2nd Order Sigma Delta Modulator Design using Delta Sigma Toolbox
Author : Nadeem Tariq Beigh , Prince Nagar , Aamir Bin Hamid , Faizan Tariq Beigh and Faroze AhmadVolume 7 No.2 July-December 2018 pp 41-45
Abstract
This paper discusses the block level design of 2nd order sigma delta using the Delta Sigma Toolbox and Simulink .An optimized modulator is designed with scaled coefficients, giving a low power, low frequency and high OSR modulator. The modulator presented has an OSR of 256, bandwidth of 200Hz, SNR of 100dB, SNDR of 96 dB, ENOB of 16 bits (approx.).The designed modulator is ideal for low power and low frequency applications, as in case of conversion of brain wave signals which are in the frequency range of 10-100Hz.This work provides the baseline for the design of the same modulator using switched capacitor in CMOS technology of 0.18μm TMSC CMOS technology with VDD of 1.8V.The coefficient values a, b, g, c are the ratios of capacitors in switched capacitor level design.
Keywords
Sigma Delta, Delta sigma, Simulink, MATLAB, CMOS, ADC, EEG Sensor.
References
[1] Yong Sheng Wang, Ya Qin Ru, Yang Liu, Xiao Zhou, Shan Li, Bei Cao and Xiao Wei Liu, “An Area-Efficient Multi-Bit Sigma-Delta Modulator “,IEEE , Vol. 19, No. 3,2016.
[2] Paulo C´esar C. de Aguirre, Hamilton D. Klimach, Altamiro A. Susin, “A Third-Order 1 MHz Continuous-Time Sigma-Delta Modulator in a 130 nm CMOS Process”, IEEE, 2015.
[3] Vitalii Artuhov, Oleksii Brytov, “Analysis of Sigma-Delta Modulator with Distributed Feedback”, IEEE First Ukraine Conference on Electrical and Computer Engineering (UKRCON), 2017.
[4] Bhanuteja G, Veda Sandeep Nagaraja, “Design and Simulation of Sigma Delta Modulator using Switch Capacitor Architecture” , International Research Journal of Engineering and Technology, Vol. 03, No. 07 , July-2016.
[5] Wenbin Bai, Yifei Wang and Z Zhangming , “ A 0.8-V 1.7-μW 25.9-fJ Continuous-Time Sigma- Delta Modulator for Biomedical Applications” , IEEE, 2016.
[6] F. Calder´on-Preciado, F. Sandoval-Ibarra and Silveira, “Synthesis and Design of a 4th Order Low-Pass DT Sigma-Delta Modulator in a 130nm CMOS process” , IEEE, 2017.
[7] Maral Faghanil, Maryam Isa, Mohd Nizar Hamidon and Amin Mazaheri, “A comparison between two different FPGA-based topologies of first order sigma-delta modulator”, IEEE International Circuits and Systems Symposium, 2015.
[8] Arshad Hussain, Sai-Weng Sin, Chi-Hang Chan, U Seng-Pan (Ben), Franco Maloberti and Rui P. Martins , “ Active–Passive SD Modulator for High-Resolution and Low-Power Applications”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016.
[9] Roman Kochan, Tomasz Ganczarczyk , Orest Kochan and Halyna Klym , “Integral Nonlinearity of Third Order Single Bit Sigma-Delta Modulator”, 16th International Conference on Control, Automation and Systems, Korea, 2016
[10] Bła˙zej Nowacki, Nuno Paulino and João Goes,“A Third-Order MASH SD ModulatorUsing Passive Integrators”, IEEE Transactions on Circuits and Systems–I: Regular Papers, 2017.
[11] Feyyaz Melih Akcakaya and Gunhan Dundar, “Low power 3rd order Feedforward Sigma Delta ADC Design”,Turkish Journal of Electrical Engineering & Computer Sciences, Vol. 25, pp. 155-162, 2017.